Theo Verelst Analog Synthesizer blocks page

Some of the maini ingredients in prototype form, remember I have only my memory to work from, and not all is up to (my) standards, but I made this stuff work.


                                                 |                              |
                                                ---                             |
                                    -------     | |                             |
                  |-----------------|     |---->| | Rp1 Resonance               |
                  |                 -------     | |                             |
                  |  |\               R4        ---                             |
          ------  |  | \                         |                              |
Audio >---  R2  -----|  >--------               ---                             |
in      | ------  |  | /        |                             ------...------   |
        |         |  |/ Opamp   |    (Ccouple) | |            | Filter 2    |   |
       ---        |             |--------------| |------>  ...| through     |---|-->
       | | R3     |     | |     |              | |  Audio     | 4           |
       | |        |-----| |-----|                   out       ------...------
       ---        |     | | C1  |                              |
        |         |             |                              |
        |         |   -------   |                              |
        ----   -------  R1   ----                              |
           |   |      -------                                  |
           -----                                               |
             |   cmos switch (1/4 4066 (or 74HC equiv?))       |
       PWM Clock in
       e.g. 8x44kHz

Rougly R1=R2 (unity gain, for oscilating filter make sure overal gain is slightly higher than 1).
2pixC1xR2 is rougly the lower cutoff frequency.
R3/R2 = rougly the variation of the cutoff frequency, I even tried 3 decaded to get a 20 Hz to 20 KHz range, which of course makes the high frequency voltage control input highly susceptible to noise and offset.
Evidently the opamps should have their non-inverting input at the desired zero voltage.

A voltage control PWM generator

To control the above filter from a voltage instead of a pulsewidth, a simple triangle of sawtooth generator and comparator will do. Roughly like this:

This will give a linear cutoff frequency dependence on the control voltage. Alternatively, a capacitors chargin curve can be used to give the filter a logarithmic respons, lets say an equivalent of the 1 Volt/octave standard, by making an exponential oscilator by replacing the current source by a resistor.

The sensitivity of the above design for capacitor and resitor values is small, ordinary parts will do fine, for high quality the parts could be matched or high precision. Because of the pulse width controlled voltage input, offset and multiplicative errors are circumvented, and a processor or microcontroller or some random logic can reasonable easy be used to make a highly accurate pulse width modulation index.
Various possibilties exist to tackle the offset (+ noise) and absolute voltage control range problems, mainly by observing that linking the capacitor decay rate with PLL can fix the absolute error, and that charge coupling of the comparator circuitry can virtually compensate for its offset.

Cheap and fast DA

  Din0  |        |
   ---->|        |----| Rx  |------| 2Rx |---------
        |        |              |-------------    |
  Din1  |        |                           |   ---
   ---->|        |----| Rx  |------| Rx  |----
        |        |              |
        .        .             | |
        .        .             | | Rx
  Din7  .        .              .
   ---->|        |----| Rx  |------| 2Rx |---------
        |        |              |                 |
  Clock |        |              |   |----        ---
   ---->|        |             -------  |
 Enable |        |              \+ -/   | Hi Zin Opamp 
   ---->|        |               \ /    |
   |    |        |                V     |
  ---   ----------                |     |
         74HC573                  |

It should work until 10 to 12 bits or so using precision resistors, possibly more. I used a set of R's from one series of 3k3, because I happeded to have them. Converion time (apart from opamp): easily in the <.1 uSec range. The reason this works with ordinaryu and cheap parts is that cmod outputs (unlike their ttl counterparts almost clamp to the supply rails with very small and constant offset.

Accuracy considerations and alternatives

Alternatively, time division can be used to produce relatively simple da (and ad) converters. The main idea I programmed on the Z80 board mentioned elsewhere with a simple software triangle generator and comparison to generate a single pulse width modulated IO bit, for instance for driving a power FET to nicely dim a car head light (without the need for heat sinks). A six bit version could produce audio at sufficiently high sample rate in software.
Using the same idea in hardware, "single bit" CD sampling rate conversions are possible (44kHz x 256 = ca. 10 MHz). More interestingly te abovementioned circuit can be combined to do 16 bit conversions, with probably reasonaby good specs (didn't have a chace to check it). Multiple channel versions would take little more than a few SH circuits.
The multiplying dac idea can also be used either by storing a da-ed value in a capacitor whose decay curve (of desired shape, started by the clocking in of another datword) can be input to a comparitor driving the enable output of the 573. Works fine for synthesizer dca functionality and mixing of generator outputs by simply gathering up the results in a resetable integrator linked with a sample and hold and filter output circuit. The multiplying accuracy can be quite good and yields accurate small signal behaviour, and alleviates the need for another form of multiplication, either digitally or analogwise.

Sample and hold, selectors and multiplexers

Selectors and multiplexers are the easiest, they mainly consist of standard, preferably fast decoding logic for instance 1 to 16 decoders from 74HC series, driving a cmos based bilateral switch. Several chips exist which combine this functionality, for instance in an 8 channel fashion, but as I remember using seperate decoupled gates gives better cross talk figures. I recently noticed that Analog Devices has similar (and bigger, even matrix versions) devices with quite good specs.
A logical extension of analog switches is a sampe and hold circuit, for instance usefull for multiplexing DA outputs to multiple channels. I tried some straightforward circuits (opamp input buffer, fet opamp output buffer, single CMOS switch, and a 50 pF capacitor) and found that they can have set times of at least roughly 1uS, and 8 bit accuracy compatible hold times of seconds.

Integrating S&H

In other word a switched integrator: basically the above with a C in the opamp feedback, and another switch to decharge it. Interesting possibilities for preventing offset problems exist (I took some tome to consider this and will write more as I recollect the results) by also using a switch to compensate for the opamps offset by reversing a remaining offset voltage. Nice material for accurate a DA or AD converters. Of course using currents instead of voltage is also a good idea, the main point is that these cmos switches have near perfect properties when lightly loaded.
An analog alternative for DA conversion would be to use the exponential decay curve of a capacitor in combination with a switched integrator. Offset problems would easily spoil the fun, but I'll try to dig up some ideas that some time ago seemed valid to make this work.

AD ?

A da converter and roughly the number of required bits times the desired conversion rate, a fast enough comparator, and some bit shifting and buffer logic suffice to make a ad converter, preferably preceded by niquist filter and sample and hold (even better: integrating SH) unit.